Mosfet termination design and core cell configuration to increase breakdown voltage and to improve device ruggedness
US5930630A
Method for device ruggedness improvement and on-resistance reduction for power MOSFET achieved by novel source contact structure
US5763914A
Cell topology for power transistors with increased packing density
US5883410A
Edge wrap-around protective extension for covering and protecting edges of thick oxide layer
US6281547B1
Power transistor cells provided with reliable trenched source contacts connected to narrower source manufactured without a source mask
US6046078A
Semiconductor device fabrication with reduced masking steps
US5907169A
Self-aligned and process-adjusted high density power transistor with gate sidewalls provided with punch through prevention and reduced JFET resistance
US5877528A
Structure to provide effective channel-stop in termination areas for trenched power transistors
US5883416A
Gate-contact structure to prevent contact metal penetration through gate layer without affecting breakdown voltage
US5986304A
Punch-through prevention in trenched DMOS with poly-silicon layer covering trench corners
US5747853A
Semiconductor structure with controlled breakdown protection
US5923065A
Power MOSFET device manufactured with simplified fabrication processes to achieve improved ruggedness and product cost savings
US5729037A
MOSFET structure and fabrication process for decreasing threshold voltage
US5895951A
MOSFET structure and fabrication process implemented by forming deep and narrow doping regions through doping trenches
US5668026A
DMOS fabrication process implemented with reduced number of masks
US6104060A
Cost savings for manufacturing planar MOSFET devices achieved by implementing an improved device structure and fabrication process eliminating passivation layer and/or field plate
US5731611A
MOSFET transistor cell manufactured with selectively implanted punch through prevent and threshold reductoin zones
