Interconnect structure having smaller transition layer via
US2013087932A1
Integrated circuits and methods of designing the same
US2012313256A1
Non-hierarchical metal layers for integrated circuits
US2012131523A1
Method of generating an intellectual property block design kit, method of generating an integrated circuit design, and simulation system for the integrated circuit design
US8119310B1
Mask-shift-aware rc extraction for double patterning design
US2011035717A1
Optimization for circuit migration
US2012025273A1
Electromigration resistant standard cell device
US2010205577A1
Methods for E-beam direct write lithography
US2010196803A1
Methods for cell boundary isolation in double patterning design
US2011035715A1
System and method for on-chip-variation analysis
US2010065913A1
Performance-aware logic operations for generating masks