|
US2018166116A1
|
|
DIMM DRAM memory chips quick optical data erasure after power cycling
|
|
US2015221363A1
|
|
Method for cache sram data retention in switched off power supply mode generating extremely small power dissipation
|
|
US2013286718A1
|
|
Methods for reducing power dissipation in drowsy caches and for retaining data in cache-memory sleep mode
|
|
US2010034013A1
|
|
Optical refreshing of loadless for transistor SRAM cells
|
|
WO2006021827A1
|
|
Single-ended optically biased three transistor fully static ram cell
|
|
US2006176083A1
|
|
Single ended three transistor quasi-static ram cell
|
|
US5029140A
|
|
Dynamic memory cell
|
|
US4789964A
|
|
Optoelectronic dynamic random access memory system
|
