Methods and apparatuses for low-power multi-level encoded signals
US2013194032A1
Apparatuses and methods for providing capacitance in a multi-chip module
US2013043900A1
Adjustable data drivers and methods for driving data signals
US2012179434A1
Recursive summation algorithms useful for statistical signal analysis of transmission of signals in a computer system
US2012016651A1
Simulating the transmission of asymmetric signals in a computer system
US2012016650A1
Simulating the transmission and simultaneous switching output noise of signals in a computer system
US2011222623A1
Communication interface with configurable encoding based on channel termination
US2011193620A1
Reference voltage generator for single-ended communication systems
US2010283503A1
Reference voltage circuits and on-die termination circuits, methods for updating the same, and methods for tracking supply, temperature, and/or process variation
US2010199017A1
Data encoding using spare channels in a memory system
US2010127758A1
Apparatus for bypassing faulty connections
US2010102853A1
Circuitry and methods minimizing output switching noise through split-level signaling and bus division enabled by a third power supply
US2009313521A1
Data bus inversion usable in a memory system
US2009247088A1
Apparatus and method for signal transmission over a channel
US2009182909A1
Asymmetric chip-to-chip interconnect
US2009157376A1
Techniques for incorporating timing jitter and/or amplitude noise into hardware description language-based input stimuli
US2009094302A1
Incorporating noise and/or jitter into waveform generation
