|
US2014063882A1
|
|
Circuit Arrangement with Two Transistor Devices
|
|
US2014015586A1
|
|
Integrated semiconductor device and a bridge circuit with the integrated semiconductor device
|
|
US2012289003A1
|
|
Method for forming a semiconductor device
|
|
US2014001552A1
|
|
Super junction semiconductor device comprising a cell area and an edge area
|
|
US2013240985A1
|
|
Semiconductor device including auxiliary structure and methods for manufacturing a semiconductor device
|
|
US2013240986A1
|
|
Semiconductor device including charged structure and methods for manufacturing a semiconductor device
|
|
US2013240955A1
|
|
Vertical transistor having edge termination structure
|
|
US2013234145A1
|
|
Semiconductor device and method for fabricating a semiconductor device
|
|
US2012153386A1
|
|
Semiconductor component with a space saving edge structure
|
|
US2013146970A1
|
|
Semiconductor device including first and second semiconductor elements
|
|
US2013134509A1
|
|
Semiconductor device arrangement comprising a semiconductor device with a drift region and a drift control region
|
|
US2012146133A1
|
|
Method for producing a semiconductor component with insulated semiconductor mesas
|
|
US2013082768A1
|
|
Diode with controllable breakdown voltage
|
|
US2013075724A1
|
|
Semiconductor arrangement with an integrated hall sensor
|
|
US2013069710A1
|
|
Power transistor with controllable reverse diode
|
|
US2013037906A1
|
|
Semiconductor device and a method for forming a semiconductor device
|
|
US2012305932A1
|
|
Lateral trench MESFET
|
|
US2012305987A1
|
|
Lateral trench MESFET
|
|
US2012306464A1
|
|
Circuit configured to adjust the activation state of transistors based on load conditions
|
|
US2012264259A1
|
|
Method for forming a semiconductor device and a semiconductor device
|
