|
US2012167033A1
|
|
Controlling plating stub reflections in a chip package
|
|
US2012004930A1
|
|
Managing and Providing Healthcare Services
|
|
US2011303445A1
|
|
Printed circuit board with reduced dielectric loss
|
|
US2011289463A1
|
|
Electrical design space exploration
|
|
US2011267906A1
|
|
Measuring SDRAM control signal timing
|
|
US2011161055A1
|
|
Space solution search
|
|
US2011149740A1
|
|
Receiver signal probing using a shared probe point
|
|
US2011140709A1
|
|
Locating short circuits in printed circuit boards
|
|
US2011133326A1
|
|
Reducing plating stub reflections in a chip package using resistive coupling
|
|
US2011127062A1
|
|
Cable for high speed data communications
|
|
US2011073359A1
|
|
Through hole-vias in multi-layer printed circuit boards
|
|
US2010229131A1
|
|
Swarm intelligence for electrical design space modeling and optimization
|
|
US2010118019A1
|
|
Dynamically managing power consumption of a computer with graphics adapter configurations
|
|
US2010100412A1
|
|
Workflow management in a global support organization
|
|
US2009007048A1
|
|
Design structure for a computer memory system with a shared memory module junction connector
|
|
US2010014569A1
|
|
Identifying an optimized test bit pattern for analyzing electrical communications channel topologies
|
|
US2009308649A1
|
|
Printed circuit board with reduced signal distortion
|
|
US2009091345A1
|
|
Structure for providing a duplicate test signal of an output signal under test in an integrated circuit
|
|
US2009263768A1
|
|
Generating an optimized analytical business transformation
|
|
US2009144256A1
|
|
Workflow control in a resource hierarchy
|
