|
US2013230093A1
|
|
Shift register based downsampled floating tap decision feedback equalization
|
|
US2013114665A1
|
|
Low nonlinear distortion variable gain amplifier
|
|
US2011274154A1
|
|
Compensated phase detector for generating one or more clock signals using DFE detected data in a receiver
|
|
US2009110045A1
|
|
Method and apparatus for rate-dependent equalization
|
|
US2009110046A1
|
|
Method and apparatus for equalization using one or more qualifiers
|
|
US2009097541A1
|
|
Methods and apparatus for determining receiver filter coefficients for a plurality of phases
|
|
US2009097538A1
|
|
Methods And Apparatus For Adaptive Equalization Using Pattern Detection Methods
|
|
US2009086807A1
|
|
Methods and apparatus for determining threshold of one or more DFE transition latches based on incoming data eye
|
|
US2007237275A1
|
|
Method and apparatus for a time domain zero phase start using binary sampled data
|
