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High speed interface device
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Programmable self-calibrating vernier and method
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Method and apparatus for impedance matching in a transmission line
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Line termination incorporating compensation for device and package parasites
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Means of reducing threshold offset caused by sending data at rates above the channel bandwidth
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Receiver with automatic skew compensation
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Channel time calibration means
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Timing control means for automatic compensation of timing uncertainties
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DDR SDRAM memory test system with fault strobe synchronization
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High speed memory test system with intermediate storage buffer and method of testing
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Pressure actuated zero insertion force socket
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System and a method for defining transforms of memory device addresses
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TW452906B
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A skew calibration means and a method of skew calibration
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System and a method for transformation of memory device addresses
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A memory test system with a means for test sequence optimisation and a method of its operation
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System and a method for processing information about locations of defective memory cells and a memory test with defect compression means
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