|
US2014075261A1
|
|
Optimized mechanism to simplify the circulant shifter and the P/Q kick out for layered LDPC decoder
|
|
US2013311845A1
|
|
Systems and methods for non-binary LDPC encoding
|
|
US2013311846A1
|
|
Systems and methods for hardware flexible low density parity check conversion
|
|
US2013212447A1
|
|
Non-binary LDPC decoder with low latency scheduling
|
|
US2012089888A1
|
|
Systems and methods for multi-level quasi-cyclic low density parity check codes
|
|
US2013148232A1
|
|
Systems and methods for combined binary and non-binary data processing
|
|
US2013120169A1
|
|
Systems and methods for reduced power multi-layer data decoding
|
|
US2013120167A1
|
|
Systems and methods for memory efficient data decoding
|
|
US2012331370A1
|
|
Systems and methods for non-binary decoding
|
|
US2012331369A1
|
|
Systems and methods for error correction using low density parity check codes using multiple layer check equations
|
|
US2012331363A1
|
|
Systems and methods for reduced format non-binary decoding
|
|
US2012262814A1
|
|
Systems and methods for selective decoder input data processing
|
|
US2012089883A1
|
|
Systems and methods for error correction using irregular low density parity check codes
|
|
US2011264987A1
|
|
Systems and methods for low density parity check data encoding
|
|
US2011264980A1
|
|
Systems and methods for low density parity check data decoding
|
|
US2011029835A1
|
|
Systems and methods for quasi-cyclic LDPC code production and decoding
|
|
US2008244359A1
|
|
Techniques for correcting errors using iterative decoding
|
