Learn more

INTERSIL CORP

Overview
  • Total Patents
    321
About

INTERSIL CORP has a total of 321 patent applications. Its first patent ever was published in 1993. It filed its patents most often in United States, EPO (European Patent Office) and Japan. Its main competitors in its focus markets semiconductors, basic communication technologies and machines are NAT SEMICONDUCTOR CORP, SPECTRIAN INC and HITACHI TOBU SEMICONDUCTOR LTD.

Patent filings per year

Chart showing INTERSIL CORPs patent filings per year from 1900 to 2020

Top inventors

# Name Total Patents
#1 Zeng Jun 24
#2 Pullen Stuart 15
#3 Webster Mark 14
#4 Ludeman Christopher 12
#5 Kocon Christopher 12
#6 Grebs Thomas 11
#7 Roberts Richard 10
#8 Nelson George 10
#9 Hemmenway Donald 10
#10 Butler John 10

Latest patents

Publication Filing date Title
US2014110819A1 Ballasted polycrystalline fuse
CN101563879A Method for providing bidirectional communication protocol, circuit and apparatus
US2007279408A1 Method and system for data transmission and recovery
US2005156579A1 Multiphase converter with zero voltage switching
US2005258814A1 High light load efficiency synchronous buck regulator with pulse skipping control
TW200403774A Matched impedance bonding technique in high-speed integrated circuits
US7113551B2 Transmitter with limited spectral regrowth and method therefor
US6853252B2 Phase-lock loop having programmable bandwidth
US6809416B1 Package for integrated circuit with thermal vias and method thereof
US6931089B2 Phase-locked loop with analog phase rotator
US2002190778A1 Apparatus and method for minimizing spurious harmonic noise in switched current steering architectures
TW502491B Oscillator having reduced sensitivity to supply voltage changes
KR20020006583A Improved bicmos process with low temperature coefficient resistor(tcrl)
EP1248354A1 Multi-phase converter with balanced currents
US6680604B2 Methods to control the droop when powering dual mode processors and associated circuits
EP1183734A1 Lateral dmos improved breakdown structure and method
KR20010040186A Technique for minimizing gate charge and gate to drain capacitance in power mos devices such as dmos, igbts, and mosfets
US6829353B1 Mechanism for preventing clipping of pulse metering signals in telephone line card channels
US6829354B1 Biasing arrangement for optimizing DC feed characteristics for subscriber line interface circuit
US6469519B1 Precision loop voltage detector for subscriber line interface circuit applications