US4325085A
|
|
Method and apparatus for adaptive facsimile compression using a two dimensional maximum likelihood predictor
|
US4305047A
|
|
Feedback circuit for controlling the peak optical output power of an injection laser
|
US4305150A
|
|
On-line channel quality monitor for a communication channel
|
US4250458A
|
|
Baseband DC offset detector and control circuit for DC coupled digital demodulator
|
US4206420A
|
|
Phase locked loop with automatic sweep
|
GB1581521A
|
|
Tdma multiplexer-demultiplexer with multiple ports
|
GB1600755A
|
|
Communications processor
|
US4174505A
|
|
Directional PSK modulation and demodulation system
|
US4068104A
|
|
Interface for in band SCPC supervisory and signalling system
|
CA1072189A
|
|
Side locked loop with circuit for preventing sidelock
|
US4063038A
|
|
Error coding communication terminal interface
|
US4000476A
|
|
Phase locked loop with circuit for preventing sidelock
|
US4054753A
|
|
Double sync burst TDMA system
|
US4061979A
|
|
Phase locked loop with pre-set and squelch
|
US4002845A
|
|
Frame synchronizer
|
US3940558A
|
|
Remote master/slave station clock
|
US3922496A
|
|
TDMA satellite communications system with guard band obviating ongoing propagation delay calculation
|