|
US2019392315A1
|
|
Word2VEC Processing System
|
|
US2020341772A1
|
|
Efficient Architectures For Deep Learning Algorithms
|
|
US10691632B1
|
|
Permutated ring network interconnected computing architecture
|
|
US2019339733A1
|
|
System and methods for completing a cascaded clock ring bus
|
|
US2019319775A1
|
|
System and method for asynchronous, multiple clock domain data streams coalescing and resynchronization
|
|
US2018145850A1
|
|
Permutated Ring Network
|
|
US2018145849A1
|
|
Distributed control synchronized ring network architecture
|
