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Store queue supporting ordered and unordered stores
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Efficient interleaving between a non-power-of-two number of entities
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Bloom bounders for improved computer system performance
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Facilitating error detection and correction after a memory component failure
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Hierarchical bloom filters for facilitating concurrency control
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Mechanism for increasing parallelization in computer programs with read-after-write dependencies associated with prefix operations
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Bandwidth-efficient directory-based coherence protocol
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Speculative writestream transaction
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Cache-coherency protocol with held state
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Store queue with store-merging and forward-progress guarantees
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Deadlock avoidance during store-mark acquisition
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Selectively performing lookups for cache lines
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Coherence protocol with dynamic privatization
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Hard component failure detection and correction
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Facilitating efficient transactional memory and atomic operations via cache line marking
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Content-addressable memory that supports a priority ordering between banks
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Computer system with multiple classes of device IDs
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