| # | Country | Total Patents | |
|---|---|---|---|
| #1 | United States | 15 | |
| #2 | WIPO (World Intellectual Property Organization) | 3 |
| # | Industry | |
|---|---|---|
| #1 | Computer technology | |
| #2 | Basic communication technologies | |
| #3 | IT methods for management | |
| #4 | Digital networks |
| # | Technology | |
|---|---|---|
| #1 | Electric digital data processing | |
| #2 | Data processing systems | |
| #3 | Pulse technique | |
| #4 | Code conversion | |
| #5 | Digital information transmission |
| # | Name | Total Patents |
|---|---|---|
| #1 | Master Paul | 7 |
| #2 | Master Paul L | 7 |
| #3 | Furtek Frederick | 6 |
| #4 | Furtek Frederick Curtis | 4 |
| #5 | Harsha Solomon | 4 |
| #6 | Andraka Raymond J | 3 |
| #7 | Mcgann L Brian | 3 |
| #8 | Knuttila Kim | 3 |
| #9 | Hogenauer Eugene B | 2 |
| #10 | Liu Tianfang | 2 |
| Publication | Filing date | Title |
|---|---|---|
| US2021073171A1 | Reconfigurable Processor Circuit Architecture | |
| WO2021026196A1 | Configuring a reduced instruction set computer processor architecture to execute a fully homomorphic encryption algorithm | |
| US2020213079A1 | Method and Apparatus for Configuring a Reduced Instruction Set Computer Processor Architecture to Execute a Fully Homomorphic Encryption Algorithm | |
| US2019340152A1 | Reconfigurable reduced instruction set computer processor architecture with fractured cores |