|
US5793385A
|
|
Address translator for a shared memory computing system
|
|
US5781768A
|
|
Graphics controller utilizing a variable frequency clock
|
|
US5638083A
|
|
System for allowing synchronous sleep mode operation within a computer
|
|
US5555460A
|
|
Method and apparatus for providing a reformatted video image to a display
|
|
US5473572A
|
|
Power saving system for a memory controller
|
|
US5802548A
|
|
Software programmable edge delay for SRAM write enable signals on dual purpose cache controllers
|
|
US5422654A
|
|
Data stream converter with increased grey levels
|
|
US5432905A
|
|
Advanced asyncronous video architecture
|
|
US5386584A
|
|
Interrupt-generating keyboard scanner using an image RAM
|
|
US5452432A
|
|
Partially resettable, segmented DMA counter
|
|
US5327364A
|
|
Arithmetic logic unit for microprocessor with sign bit extended
|
|
US5297271A
|
|
Method and apparatus for performing a read-write-modify operation in a VGA compatible controller
|
|
WO9320513A1
|
|
Method and apparatus for performing run length tagging for increased bandwidth in dynamic data repetitive memory systems
|
|
US5305319A
|
|
FIFO for coupling asynchronous channels
|
|
WO9306549A1
|
|
A system for performing input and output operations to and from a processor
|
|
US5455909A
|
|
Microprocessor with operation capture facility
|
|
US5317694A
|
|
Fast write support for vga controller
|
|
US5325516A
|
|
Processor system with dual clock
|
|
US5285192A
|
|
Compensation method and circuitry for flat panel display
|
|
US5227989A
|
|
Arithmetic logic unit for microprocessor with sign bit extend
|
