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ATOMERA INC

Overview
  • Total Patents
    163
  • GoodIP Patent Rank
    8,872
  • Filing trend
    ⇧ 2.0%
About

ATOMERA INC has a total of 163 patent applications. It increased the IP activity by 2.0%. Its first patent ever was published in 2014. It filed its patents most often in United States, WIPO (World Intellectual Property Organization) and Taiwan. Its main competitors in its focus markets semiconductors, optics and computer technology are KUO CHIEN-LI, BAARS PETER and KAKOSCHKE RONALD.

Patent filings per year

Chart showing ATOMERA INCs patent filings per year from 1900 to 2020

Top inventors

# Name Total Patents
#1 Mears Robert J 103
#2 Takeuchi Hideki 78
#3 Hytha Marek 67
#4 Stephenson Robert John 45
#5 Burton Richard 44
#6 Connelly Daniel 28
#7 Cody Nyles Wynn 24
#8 Weeks Keith Doran 17
#9 Chen Yi-Ann 14
#10 Husain Abid 14

Latest patents

Publication Filing date Title
WO2021011620A1 Semiconductor devices including hyper-abrupt junction region including a superlattice and associated methods
WO2021011629A1 Varactor with hyper-abrupt junction region including a superlattice and associated methods
WO2021011615A1 Varactor with hyper-abrupt junction region including spaced-apart superlattices and associated methods
WO2021011635A1 Semiconductor devices including hyper-abrupt junction region including spaced-apart superlattices and associated methods
US2020343367A1 Method for making a semiconductor device including a superlattice and an asymmetric channel and related methods
WO2020102283A1 Finfet including source and drain regions with dopant diffusion blocking superlattice layers to reduce contact resistance and associated methods
TW202027273A Semiconductor device including source/drain dopant diffusion blocking superlattices to reduce contact resistance and associated methods
TW202025485A Semiconductor device and method including body contact dopant diffusion blocking superlattice having reduced contact resistance and related methods
TW202010132A Method and device for making superlattice structures with reduced defect densities
US10879357B1 Method for making a semiconductor device having a hyper-abrupt junction region including a superlattice
US2021020759A1 Method for making a varactor with a hyper-abrupt junction region including spaced-apart superlattices
US10825901B1 Semiconductor devices including hyper-abrupt junction region including a superlattice
US2021020750A1 Method for making semiconductor devices with hyper-abrupt junction region including spaced-apart superlattices
US2021020749A1 Semiconductor devices including hyper-abrupt junction region including spaced-apart superlattices and related methods
US10825902B1 Varactor with hyper-abrupt junction region including spaced-apart superlattices
US10840388B1 Varactor with hyper-abrupt junction region including a superlattice
US10868120B1 Method for making a varactor with hyper-abrupt junction region including a superlattice
CN112074959A Device and method for fabricating inverted T-channel field effect transistor (ITFET) including superlattice
US2019319167A1 Method for making semiconductor device including vertically integrated optical and electronic devices and comprising a superlattice
CN111937119A Semiconductor device including enhanced contact structure with superlattice and related methods