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BAARS PETER

Overview
  • Total Patents
    24
About

BAARS PETER has a total of 24 patent applications. Its first patent ever was published in 2005. It filed its patents most often in United States. Its main competitors in its focus markets semiconductors and computer technology are KAKOSCHKE RONALD, WANG CHEN CHIH and UNISANTIS ELECTRONICS JP LTD.

Patent filings in countries

World map showing BAARS PETERs patent filings in countries
# Country Total Patents
#1 United States 24

Patent filings per year

Chart showing BAARS PETERs patent filings per year from 1900 to 2020

Focus industries

Focus technologies

Top inventors

# Name Total Patents
#1 Baars Peter 24
#2 Schloesser Till 7
#3 Lepper Marco 4
#4 Jakubowski Frank 4
#5 Scheiper Thilo 3
#6 Wei Andy 3
#7 Goldbach Matthias 3
#8 Muemmler Klaus 3
#9 Carter Richard 3
#10 Tegen Stefan 2

Latest patents

Publication Filing date Title
US8647938B1 Sram integrated circuits with buried saddle-shaped finfet and methods for their fabrication
US2013193489A1 Integrated circuits including copper local interconnects and methods for the manufacture thereof
US2013189833A1 Method of forming self-aligned contacts for a semiconductor device
US2013137234A1 Methods for forming semiconductor devices
US2013099295A1 Replacement gate fabrication methods
US2013075821A1 Semiconductor device comprising replacement gate electrode structures and self-aligned contact elements formed by a late contact fill
US2013049164A1 Methods of forming an anode and a cathode of a substrate diode by performing angled ion implantation processes
US2013049089A1 Integrated circuits that include deep trench capacitors and methods for their fabrication
US2013049123A1 Semiconductor Device with DRAM Word Lines and Gate Electrodes in Non-Memory Regions of the Device Comprised of a Metal, and Methods of Making Same
US2012313187A1 Method of removing gate cap materials while protecting active area
US2012299160A1 Method of forming contacts for devices with multiple stress liners
US2012292671A1 Method of forming spacers that provide enhanced protection for gate electrode structures
US2012280296A1 Semiconductor device with DRAM bit lines made from same material as gate electrodes in non-memory regions of the device, and methods of making same
US2012248551A1 Mol insitu Pt rework sequence
US2012223412A1 Semiconductor device comprising a capacitor formed in the metallization system based on dummy metal features
US2012220086A1 Methods for fabricating a CMOS integrated circuit having a dual stress layer (DSL)
US8222103B1 Semiconductor device with embedded low-K metallization
US2012153398A1 Encapsulation of closely spaced gate electrode structures
US2008151592A1 Semiconductor device and method of fabricating a semiconductor device
US2007190773A1 Method of fabricating a semiconductor device