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Combined Two-Level Cache Directory
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Monitoring a value in storage without repeated storage access
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Prefetch address translation using prefetch buffer based on availability of address translation logic
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Collision-based alternate hashing
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Restricting processing within a processor to facilitate transaction completion
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Avoiding aborts due to associativity conflicts in a transactional environment
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Tracking transactional execution footprint
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Determining the logical address of a transaction abort
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Managing transactional and non-transactional store observability
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Mitigating conflicts for shared cache lines
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Conflict resolution of cache store and fetch requests
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Cracking destructively overlapping operands in variable length instructions
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History and alignment based cracking for store multiple instructions for optimizing operand store compare penalties
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Supporting partial recycle in a pipelined microprocessor
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System and method for Controlling restarting of instruction fetching using speculative address computations
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Facilitating processing in a computing environment using an extended drain instruction
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