Co-verification—of hardware and software, a unified approach in verification
US2016142342A1
Apparatus and method for fast search table update in a network switch
US2016014885A1
Network device, system and method having a rotated chip floorplan
US2015373164A1
Method of forming a hash input from packet contents and an apparatus thereof
US2015372926A1
Leaky bucket model to mimic behavior of a mac and a method thereof
US2015365355A1
Hierarchical statistically multiplexed counters and a method thereof
US2015365339A1
Counter with overflow fifo and a method thereof
CN104052669A
Apparatus and Method for Processing Alternately Configured Longest Prefix Match Tables
KR20140111986A
Apparatus and method for processing alternately configured longest prefix match tables
US2014321467A1
Apparatus and method for table search with centralized memory pool in a network switch
US2014269723A1
Apparatus and method for processing alternately configured longest prefix match tables
US2015186516A1
Apparatus and method of generating lookups and making decisions for packet modifying and forwarding in a software-defined network engine
US9256380B1
Apparatus and method for packet memory datapath processing in high bandwidth packet processing devices
US9009364B1
Apparatus and method for accelerated page link list processing in a packet processor operating at wirespeed
US9438539B1
Apparatus and method for optimizing the number of accesses to page-reference count storage in page link list based switches
US9509585B1
Apparatus and method for time stamping packets across several nodes in a network
US9736069B1
Method for storing and retrieving packets in high bandwidth and low latency packet processing devices
US2015186560A1
System for and method of combining CMOS inverters of multiple drive strengths to create tune-able clock inverters of variable drive strengths in hybrid tree-mesh clock distribution networks
US2015186589A1
System for and method of placing clock stations using variable drive-strength clock drivers built out of a smaller subset of base cells for hybrid tree-mesh clock distribution networks
US2015186583A1
System for and method of tuning clock networks constructed using variable drive-strength clock inverters with variable drive-strength clock drivers built out of a smaller subset of base cells