TERANETICS INC has a total of 41 patent applications. Its first patent ever was published in 2003. It filed its patents most often in United States, Taiwan and WIPO (World Intellectual Property Organization). Its main competitors in its focus markets telecommunications, basic communication technologies and digital networks are MULTIPHY LTD, NOVELSAT LTD and KNOWLEDGE DEV FOR POF S L.
# | Country | Total Patents | |
---|---|---|---|
#1 | United States | 17 | |
#2 | Taiwan | 14 | |
#3 | WIPO (World Intellectual Property Organization) | 8 | |
#4 | China | 2 |
# | Industry | |
---|---|---|
#1 | Telecommunications | |
#2 | Basic communication technologies | |
#3 | Digital networks | |
#4 | Computer technology | |
#5 | Environmental technology |
# | Technology | |
---|---|---|
#1 | Transmission | |
#2 | Digital information transmission | |
#3 | Code conversion | |
#4 | Static stores | |
#5 | Telephonic communication | |
#6 | Amplification control | |
#7 | Amplifiers | |
#8 | Climate change mitigating computer technologies | |
#9 | Resonators | |
#10 | Multiplex communication |
# | Name | Total Patents |
---|---|---|
#1 | Tellado Jose | 25 |
#2 | Gupta Sandeep Kumar | 14 |
#3 | Kasturia Sanjay | 12 |
#4 | Dabiri Dariush | 10 |
#5 | Cohan Eran | 3 |
#6 | Cohen Eran | 3 |
#7 | Barot Nitin | 3 |
#8 | Taich Dimitry | 3 |
#9 | Gupta Sandeep | 2 |
#10 | Dalmia Kamal | 2 |
Publication | Filing date | Title |
---|---|---|
US2008304576A1 | Efficient decoding | |
WO2007106700A2 | Transceiver non-linearity cancellation | |
US2008151792A1 | Aiding synchronization between master and slave transceivers | |
US2008049818A1 | Multiple transmission protocol transceiver | |
US2007192505A1 | Auto-sequencing transmission speed of a data port | |
US2007140289A1 | Transceiver power backoff | |
US2007081475A1 | Multiple modulation rate 10Gbase-T transmission | |
US2007042721A1 | Receiver ADC clock delay base on echo signals | |
US2006280234A1 | Single amplifier presale processing circuitry | |
US2006218458A1 | Efficient decoding | |
US7075471B1 | Double-sampled, time-interleaved analog to digital converter | |
US7015842B1 | High-speed sampling architectures | |
US2006047857A1 | Low-power receiver decoding | |
US7366231B2 | Sub-block domain transformation multiple signal processing | |
US7333448B2 | Full duplex transceiver | |
US7227883B2 | Method and apparatus for domain transformation multiple signal processing |