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SUPERCOMPUTER SYSTEMS LTD

Overview
  • Total Patents
    59
About

SUPERCOMPUTER SYSTEMS LTD has a total of 59 patent applications. Its first patent ever was published in 1989. It filed its patents most often in WIPO (World Intellectual Property Organization), United States and Australia. Its main competitors in its focus markets computer technology, machines and telecommunications are TRANSTOUCH TECHNOLOGY INC, VALID LOGIC SYSTEMS INC and STRATUS COMPUTER INC.

Patent filings per year

Chart showing SUPERCOMPUTER SYSTEMS LTDs patent filings per year from 1900 to 2020

Top inventors

# Name Total Patents
#1 Spix George A 23
#2 Beard Douglas R 19
#3 Phelps Andrew E 16
#4 Miller Edward C 13
#5 Gaertner Gregory G 12
#6 Chen Steve S 11
#7 Wengelski Diane M 10
#8 Eckert Roger E 9
#9 Cox David M 9
#10 Silbey Alexander A 9

Latest patents

Publication Filing date Title
US5307478A Method for inserting a path instruction during compliation of computer programs for processors having multiple functional units
US5193187A Fast interrupt mechanism for interrupting processors in parallel in a multiprocessor system wherein processors are assigned process ID numbers
US5202975A Method for optimizing instruction scheduling for a processor having multiple functional resources
US5276955A Multilayer interconnect system for an area array interconnection using solid state diffusion
WO9120039A1 Method and apparatus for a load and flag instruction
WO9120031A1 Method for optimizing instruction scheduling
WO9203779A1 Method of efficient communication between coprocessors
WO9120042A1 Fast interrupt mechanism for a multiprocessor system
WO9203784A1 Scheduling method for a multiprocessing operating system
WO9203783A1 Method of implementing kernel functions
AU8447491A Method and apparatus for non-sequential resource access
WO9120032A1 Integrated development and maintenance software system
WO9212477A1 Graphical display of compiler generated intermediate databases
US5142100A Transmission line with fluid-permeable jacket
US5187789A Graphical display of compiler-generated intermediate database representation
US5107418A Method for representing scalar data dependences for an optimizing compiler
US5159678A Method for efficient non-virtual main memory management
US5175856A Computer with integrated hierarchical representation (ihr) of program wherein ihr file is available for debugging and optimizing during target execution
US5193192A Vectorized LR parsing of computer programs
US5202988A System for communicating among processors having different speeds