US2014223244A1
|
|
Flash storage device with read disturb mitigation
|
US2014229774A1
|
|
Apparatus and method for determining an operating condition of a memory cell based on cycle information
|
US2013318422A1
|
|
Read level adjustment using soft information
|
US2013304970A1
|
|
Systems and methods for providing high performance redundant array of independent disks in a solid-state device
|
US2013297858A1
|
|
Systems and methods for providing channel buffer in a solid-state device
|
US2013254562A1
|
|
Power arbitration for storage devices
|
US2013290612A1
|
|
Soft information module
|
US2013254467A1
|
|
System and method for scanning flash memories
|
US2013227200A1
|
|
Determining bias information for offsetting operating variations in memory cells based on wordline address
|
US2013176784A1
|
|
Adjusting operating parameters for memory cells based on wordline address and cycle information
|
US2013212451A1
|
|
Reduced complexity non-binary LDPC decoding algorithm
|
US2013159611A1
|
|
Systems and methods for providing load isolation in a solid-state device
|
US2013182506A1
|
|
Programming algorithm for improved flash memory endurance and retention
|
US2013163327A1
|
|
Word-line inter-cell interference detector in flash system
|
US2013163328A1
|
|
Inter-cell interference algorithms for soft decoding of LDPC codes
|
US2013166795A1
|
|
System and method for streaming data in flash memory applications
|
US2013191581A1
|
|
Multi-layer input/output pad ring for solid state device controller
|
US2013179480A1
|
|
System and method for operating a clustered file system using a standalone operation log
|
US2013318391A1
|
|
Methods for managing failure of a solid state device in a caching storage
|
US2013159629A1
|
|
Method and system for hash key memory footprint reduction
|