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Shanghai High Performance Integrated Circuit Design Center

Overview
  • Total Patents
    23
  • GoodIP Patent Rank
    69,817
About

Shanghai High Performance Integrated Circuit Design Center has a total of 23 patent applications. Its first patent ever was published in 2019. It filed its patents most often in China. Its main competitors in its focus markets computer technology and digital networks are KEY TECHNOLOGY CORP, XITORE INC and SCOULLER ROSS S.

Patent filings in countries

World map showing Shanghai High Performance Integrated Circuit Design Centers patent filings in countries
# Country Total Patents
#1 China 23

Patent filings per year

Chart showing Shanghai High Performance Integrated Circuit Design Centers patent filings per year from 1900 to 2020

Focus industries

Top inventors

# Name Total Patents
#1 Hu Xiangdong 18
#2 Huang Jinming 4
#3 Yin Fei 4
#4 Wang Guopeng 4
#5 Lu Dongdong 4
#6 Fan Haohao 3
#7 Zhang Xiaodong 3
#8 He Jun 3
#9 Fang Hua 3
#10 Chen Cheng 2

Latest patents

Publication Filing date Title
CN111863071A Circuit structure for realizing internal operation based on SRAM
CN110990062A Instruction prefetching filtering method
CN111081293A Read-write control circuit and memory
CN110737474A instruction address compression storage method
CN110737475A instruction buffer filling filter
CN110688289A Processor performance event dynamic monitoring method based on simulation
CN110597656A Check list error processing method of secondary cache tag array
CN110647362A Two-stage buffering transmitting device based on scoreboard principle
CN110659172A Instruction level checking method for microprocessor locking mechanism
CN110598320A Instruction set simulator calibration method based on hardware simulation accelerator
CN110705191A Method for constructing polymorphic simulation verification environment
CN110691004A Maintenance protocol message transmitting and receiving method based on hardware simulation accelerator
CN110688093A Method for realizing lock instruction pseudorandom self-comparison verification model based on global constraint
CN110673878A Instruction information query and execution debugging method based on instruction set simulator
CN110688155A Merging method for storage instruction accessing non-cacheable area
CN110609709A Retransmission self-trapping immediate processing method in superscalar microprocessor
CN110705198A Method for verifying multi-port multi-message type cross communication component
CN110688335A Device for splitting cache space storage instruction into independent micro-operations
CN110674055A Cache consistency simulation verification method for component level and component combination level
CN110688271A Controllable random fault injection method applied to processor chip simulation verification