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OPTIMUM SEMICONDUCTOR TECH INC

Overview
  • Total Patents
    126
  • GoodIP Patent Rank
    11,361
  • Filing trend
    ⇧ 30.0%
About

OPTIMUM SEMICONDUCTOR TECH INC has a total of 126 patent applications. It increased the IP activity by 30.0%. Its first patent ever was published in 2014. It filed its patents most often in WIPO (World Intellectual Property Organization), United States and Republic of Korea. Its main competitors in its focus markets computer technology, transport and audio-visual technology are Han inc, BRADBURY JONATHAN D and GONION JEFFRY E.

Patent filings per year

Chart showing OPTIMUM SEMICONDUCTOR TECH INCs patent filings per year from 1900 to 2020

Top inventors

# Name Total Patents
#1 Moudgill Mayan 90
#2 Glossner C John 69
#3 Hurtley Paul 59
#4 Hoane Arthur Joseph 55
#5 Nacer Gary J 55
#6 Senthilvelan Murugappan 51
#7 Balzola Pablo 41
#8 Kalashnikov Vitaly 35
#9 Agrawal Sitij 27
#10 Nacer Gary 24

Latest patents

Publication Filing date Title
WO2021003125A1 Feedbackward decoder for parameter efficient semantic image segmentation
WO2020176358A1 System and method for fog detection and vehicle light control
WO2020172369A1 Device and method for calculating elementary functions using successive cumulative rotation circuit
WO2020061139A1 System and method to implement masked vector instructions
WO2020056062A1 Dual adaptive collision avoidance system
WO2020050990A1 Washing machine with self-selecting washing cycle using artificial intelligence
WO2020036917A1 Vector instruction with precise interrupts and/or overwrites
WO2020028116A1 Object detection using multiple neural networks trained for different image fields
WO2020009806A1 Object detection using multiple sensors and reduced complexity neural networks
WO2019245686A1 System and method to navigate autonomous vehicles
US2020394495A1 System and architecture of neural network accelerator
US2018203703A1 Implementation of register renaming, call-return prediction and prefetch
US2018203806A1 Variable translation-lookaside buffer (TLB) indexing
US2018173625A1 Implementing atomic primitives using cache line locking
US2018173527A1 Floating point instruction format with embedded rounding rule
US2017054909A1 Video image alignment for video stabilization
US2016364236A1 Processor with mode support
US2017025757A1 Monolithic dual band antenna
CN107533461A With the computer processor for the different registers to memory addressing
US2016224512A1 Monolithic vector processor configured to operate on variable length vectors