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MEJDRICH ERIC O

Overview
  • Total Patents
    23
About

MEJDRICH ERIC O has a total of 23 patent applications. Its first patent ever was published in 2007. It filed its patents most often in United States. Its main competitors in its focus markets computer technology, digital networks and furniture and games are SATKUNARAJAH THARMALINGAM, PASTERNAK SOLUTIONS LLC and WUDA GEOINFORMATICS CO LTD.

Patent filings in countries

World map showing MEJDRICH ERIC Os patent filings in countries
# Country Total Patents
#1 United States 23

Patent filings per year

Chart showing MEJDRICH ERIC Os patent filings per year from 1900 to 2020

Top inventors

# Name Total Patents
#1 Mejdrich Eric O 23
#2 Schardt Paul E 22
#3 Shearer Robert A 22
#4 Tubbs Matthew R 16
#5 Swenson Corey V 2
#6 Muff Adam J 1

Latest patents

Publication Filing date Title
US2013185542A1 External auxiliary execution unit interface for format conversion of instruction from issue unit to off-chip auxiliary execution unit
US2013046518A1 Multithreaded physics engine with impulse propagation
US2013044117A1 Vector register file caching of context data structure for maintaining state data in a multithreaded image processing pipeline
US2011316864A1 Multithreaded software rendering pipeline with dynamic performance-based reallocation of raster threads
US2011320771A1 Instruction buffer bypass of target instruction in response to partial flush
US2011320724A1 DMA-based acceleration of command push buffer between host and target devices
US2011320719A1 Propagating shared state changes to multiple threads within a multithreaded processing environment
US2011321057A1 Multithreaded physics engine with predictive load balancing
US2011316855A1 Parallelized streaming accelerated data structure generation
US2011292063A1 Rolling texture context data structure for maintaining texture data in a multithreaded image processing pipeline
US2011289485A1 Software Trace Collection and Analysis Utilizing Direct Interthread Communication On A Network On Chip
US2011285710A1 Parallelized ray tracing
US2011285709A1 Allocating resources based on a performance statistic
US2011283090A1 Instruction operand addressing using register address sequence detection
US2010269123A1 Performance event triggering through direct interthread communication on a network on chip
US2010191940A1 Single step mode in a software pipeline within a highly threaded network on a chip microprocessor
US2010100707A1 Sequential processing in network on chip nodes by threads generating message containing payload and pointer for nanokernel to access algorithm to be executed on payload in another node
US2010100934A1 Security methodology to prevent user from compromising throughput in a highly threaded network on a chip processor
US2009282139A1 Emulating a computer run time environment
US2009182954A1 Network on chip that maintains cache coherency with invalidation messages