| # | Country | Total Patents | |
|---|---|---|---|
| #1 | United States | 10 | |
| #2 | China | 1 | |
| #3 | EPO (European Patent Office) | 1 | |
| #4 | Japan | 1 | |
| #5 | Taiwan | 1 |
| # | Industry | |
|---|---|---|
| #1 | Semiconductors | |
| #2 | Surface technology and coating | |
| #3 | Optics |
| # | Technology | |
|---|---|---|
| #1 | Semiconductor devices | |
| #2 | Single-crystal-growth | |
| #3 | Devices using light amplification | |
| #4 | Coating metallic material |
| # | Name | Total Patents |
|---|---|---|
| #1 | Hsu Ming-Sen | 8 |
| #2 | Tseng Wei-Yu | 5 |
| #3 | Hsu Kung-Hsieh | 5 |
| #4 | Tu Jiun-Wei | 4 |
| #5 | Gouda Tetsuya | 3 |
| #6 | Jong Charng Shyang | 1 |
| #7 | Chen Chun-Hung | 1 |
| #8 | Ku Chin Fu | 1 |
| #9 | Chen Chih Ming | 1 |
| #10 | Chiu Cheng-Yu | 1 |
| Publication | Filing date | Title |
|---|---|---|
| US10326049B1 | Uv light-emitting diode | |
| US2017062655A1 | Sapphire substrate with patterned structure | |
| US2007290214A1 | Light emitting diode structure | |
| TW200820467A | Light emitting diode and wafer level package method, wafer level bonding method thereof and circuit structure for wafer level package |