CHIPWORKS INC has a total of 22 patent applications. Its first patent ever was published in 2004. It filed its patents most often in Canada, United States and WIPO (World Intellectual Property Organization). Its main competitors in its focus markets computer technology, measurement and semiconductors are WISCOM SYSTEM CO LTD, CHANGSHA JINGJIA MICROELECTRONICS CO LTD and NAT SATELLITE METEOROLOGICAL CENTER NAT SPACE WEATHER MONITORING AND WARNING CENTER.
# | Country | Total Patents | |
---|---|---|---|
#1 | Canada | 6 | |
#2 | United States | 5 | |
#3 | WIPO (World Intellectual Property Organization) | 5 | |
#4 | China | 3 | |
#5 | EPO (European Patent Office) | 2 | |
#6 | Republic of Korea | 1 |
# | Industry | |
---|---|---|
#1 | Computer technology | |
#2 | Measurement | |
#3 | Semiconductors |
# | Name | Total Patents |
---|---|---|
#1 | Klibanov Lev | 11 |
#2 | Green Michael | 6 |
#3 | Campbell Jeffrey | 5 |
#4 | Szkarlat Robert | 5 |
#5 | Griffin Sherri Lynn | 3 |
#6 | Stansby Neal | 3 |
#7 | Lachance Alexander R | 2 |
#8 | Blaxell Zygo | 2 |
#9 | Lynn Griffin Sherri | 1 |
#10 | Ludlow Terry | 1 |
Publication | Filing date | Title |
---|---|---|
US2015276795A1 | Atomic force microscopy using correlated probe oscillation and probe-sample bias voltage | |
CN104105976A | Method to differential P-channel or N-channel devices based on different etching rates. | |
US2007072314A1 | Method of preparing an integrated circuit die for imaging | |
CA2521675A1 | Method of preparing an integrated circuit die for imaging | |
US2007031027A1 | Method and system for vertically aligning tile images of an area of interest of an integrated circuit | |
US2005226521A1 | Method and apparatus for producing a 3-D model of a semiconductor chip from mosaic images |