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ARTERIS INC

Overview
  • Total Patents
    46
  • GoodIP Patent Rank
    36,547
  • Filing trend
    ⇩ 14.0%
About

ARTERIS INC has a total of 46 patent applications. It decreased the IP activity by 14.0%. Its first patent ever was published in 2009. It filed its patents most often in United States, China and France. Its main competitors in its focus markets computer technology, environmental technology and digital networks are ACCELSTOR INC, PURE STORAGE INC and DUTCH MICHAEL JOHN.

Patent filings in countries

World map showing ARTERIS INCs patent filings in countries

Patent filings per year

Chart showing ARTERIS INCs patent filings per year from 1900 to 2020

Top inventors

# Name Total Patents
#1 Kruckemyer David A 10
#2 Forrest Craig Stephen 10
#3 Gaikwad Parimal 9
#4 De Lescure Benoit 7
#5 Tang Monica 7
#6 Probell Jonah 6
#7 Boutiller Alexis 6
#8 Loison Jean Philippe 4
#9 Lecler Jean-Jacques 3
#10 Van Ruymbeke Xavier 3

Latest patents

Publication Filing date Title
US10990724B1 System and method for incremental topology synthesis of a network-on-chip
US10949585B1 System and method for predicting performance, power and area behavior of soft IP components in integrated circuit design
US2020213217A1 SYSTEM AND METHOD FOR COMPUTATIONAL TRANSPORT NETWORK-ON-CHIP (NoC)
US2019384875A1 System and method for self-healing of a dynamic link
US2019384714A1 System and method for configurable cache ip with flushable address range
US2020210544A1 System and method for reducing silicon area of resilient systems using functional and duplicate logic
US2019205489A1 System and method for isolating faults in a resilient system
US2019205494A1 System and method for designing a chip floorplan using machine learning
US2019205493A1 Synthesizing topology for an interconnect network of a system-on-chip with intellectual property blocks
US2019095279A1 Recovery of a coherent system in the presence of an uncorrectable error
US2018011758A1 System and method for reducing ECC overhead and memory access bandwidth
US2017322883A1 Victim buffer for cache coherent systems
US2017255558A1 Isolation mode in a cache coherent system
US2018307557A1 Recovery of a system directory after detection of uncorrectable error
US2017192842A1 Control and address redundancy in storage buffer
US2017192689A1 System to reduce directory information storage
US2017192680A1 Directory storage control for commonly used patterns
US2018173597A1 Redundancy for cache coherence systems
US2016188473A1 Compression of hardware cache coherent addresses
US2017185477A1 Protection scheme conversion